The present invention relates to a high-frequency amplifier that uses a depression-type transistor in which a threshold voltage of the transistor is minus and, particularly, to a high-frequency amplifier that can easily obtain a negative power supply of a bias supply negative voltage of the high-frequency amplifier.
In recent years, in order to transmit a radio signal of a microwave region of 1 GHz or more of a mobile body communication terminal device such as a mobile telephone terminal, a wireless LAN terminal or the like, a high-frequency amplifier is used which employs a depression-type Field Effect Transistor (FET) using gallium arsenide (GaAs) of which an operation speed is faster than that of a bipolar transistor of the related art. In the depression-type FET, since a forward voltage of a gate is as low as approximately 0.7 V, a voltage that turns off a drain current of the FET is set low as 0 V or less (approximately −2 V) in the gate voltage. Thus, in order to turn off the drain current of the depression-type FET, it is necessary for the drain voltage to be 0 V or for the gate voltage to be set to 0 V or less (approximately −2 V). Further, as an example, the high-frequency amplifier is used in the mobile telephone, the wireless LAN system or the like described above, and is used in a transmitting section of a wireless communication device which amplifies and transmits a high-frequency signal, but is not limited to such a wireless communication device.
Thus, in order to obtain a negative voltage of 0 V or less, a power supply circuit generating a negative voltage is required separately from the high-frequency amplifier that is configured of the FET. Further, in the high-frequency amplifier, for example, if the FET configures a source ground amplifier, it is necessary to apply a desired negative voltage in advance that controls the drain current of the high-frequency amplifier in the gate voltage of the FET in the high-frequency amplifier.
A high-frequency amplifier that is configured of a depression-type FET is disclosed in PTL 1 and PTL 2. As disclosed in the Patent Literature, in the related art, as illustrated in FIG. 4, in a high-frequency amplifier 1, a high-frequency signal from a high-frequency oscillator circuit section 2 is amplified in a high-frequency amplifier circuit section 3 that is configured of the depression-type FET and the high-frequency amplifier circuit section 3 is connected to an outside power supply (not illustrated in the view) from a power supply voltage supply terminal 7. In the depression-type FET of the high-frequency amplifier circuit section 3, it is necessary to include a DC/DC converter 10 or a negative power supply circuit (not illustrated) separately through a bias circuit 5 as a bias supply source for applying a negative gate voltage. For example, as illustrated in FIG. 4, if the DC/DC converter 10 is used, the negative voltage is output from a positive voltage that is input from the DC/DC converter 10 and it is necessary to supply a bias of the negative voltage to the gate of the depression-type FET through the bias circuit 5.